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INTEGRATED CIRCUITS
DATA SHEET
TDA9813T VIF-PLL with QSS-IF and dual FM-PLL demodulator
Product specification Supersedes data of 1995 Oct 03 File under Integrated Circuits, IC02 1999 Sep 16
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
FEATURES * 5 V supply voltage * Gain controlled wide band VIF amplifier (AC-coupled) * True synchronous demodulation with active carrier regeneration (very linear demodulation, good intermodulation figures, reduced harmonics, excellent pulse response) * Separate video amplifier for sound trap buffering with high video bandwidth * VIF-AGC detector for gain control, operating as peak sync detector * Tuner AGC with adjustable takeover point (TOP) * AFC detector without extra reference circuit * AC-coupled limiter amplifier for sound intercarrier signal * Two alignment-free FM-PLL demodulators with high linearity * SIF input for single reference QSS mode (PLL controlled); SIF-AGC detector for gain controlled SIF amplifier; single reference QSS mixer able to operate in high performance single reference QSS mode * Stabilizer circuit for ripple rejection and to achieve constant output signals * ESD protection for all pins. ORDERING INFORMATION PACKAGE TYPE NUMBER NAME TDA9813T SO28 DESCRIPTION plastic small outline package; 28 leads; body width 7.5 mm GENERAL DESCRIPTION
TDA9813T
The TDA9813T is an integrated circuit for vision IF signal processing and sound dual FM demodulation, with single reference QSS-IF in TV and VCR sets. For negative modulation standards only.
VERSION SOT136-1
1999 Sep 16
2
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
QUICK REFERENCE DATA SYMBOL VP IP Vi VIF(rms) Vo CVBS(p-p) B-3 S/N(W) IM1.1 IM3.3 H(sup) Vi SIF(rms) Vo(rms) THD S/N(W) PARAMETER supply voltage supply current vision IF input signal voltage sensitivity -1 dB video at output (RMS value) CVBS output signal voltage (peak-to-peak value) -3 dB video bandwidth on pin 8 weighted signal-to-noise ratio for video intermodulation attenuation at `blue' intermodulation attenuation at `blue' suppression of harmonics in video signal sound IF input signal voltage sensitivity (RMS value) audio output signal voltage for FM (RMS value) total harmonic distortion weighted signal-to-noise ratio -3 dB at intercarrier output B/G standard; 54% modulation 54% modulation 54% modulation f = 1.1 MHz f = 3.3 MHz CL < 20 pF; RL > 1 k; AC load CONDITIONS MIN. 4.5 93 - 1.7 7 56 58 58 35 - - - -
TDA9813T
TYP. 5 109 60 2.0 8 60 64 64 40 30 0.5 0.15 60
MAX. UNIT 5.5 125 100 2.3 - - - - - 70 - 0.5 - V mA V V MHz dB dB dB dB V V % dB
1999 Sep 16
3
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TOP CAGC n.c. 25 3 4 16 5 22 21 tuner AGC loop filter TUNER AND VIF-AGC 2 VIF 1 VIF AMPLIFIER FPLL VIDEO DEMODULATOR AND AMPLIFIER 8 VIDEO BUFFER 28 SIF 27 SIF AMPLIFIER SINGLE REFERENCE MIXER 19 13 FM DETECTOR (PLL) 10 AF AMPLIFIER CVBS 2 V (p-p) Vi(vid)
BLOCK DIAGRAM
Philips Semiconductors
handbook, full pagewidth
VIF-PLL with QSS-IF and dual FM-PLL demodulator
2 x f PC AFC
20 AFC DETECTOR 18 video 1 V (p-p)
VCO TWD
4
TDA9813T
INTERNAL VOLTAGE STABILIZER 26 24 23 1/2 VP n.c. 5V SIF C AGC n.c. 5.74 7 SIF-AGC 6 9 17 5.5 15 14
AF1
FM DETECTOR (PLL) 11 AF AMPLIFIER 12
MHA037
AF2
Product specification
TDA9813T
Fig.1 Block diagram.
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
PINNING SYMBOL Vi VIF1 Vi VIF2 n.c. TADJ TPLL CSAGC n.c. Vo CVBS n.c. Vo AF1 Vo AF2 CDEC2 CDEC1 Vi FM2 Vi FM1 TAGC Vo QSS Vo(vid) Vi(vid) AFC VCO1 VCO2 Cref GND CVAGC VP Vi SIF1 Vi SIF2 PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 DESCRIPTION VIF differential input signal voltage 1 VIF differential input signal voltage 2 not connected tuner AGC takeover adjust (TOP) PLL loop filter SIF-AGC capacitor not connected CVBS output signal voltage not connected audio voltage frequency output 1 audio voltage frequency output 2 decoupling capacitor 2 decoupling capacitor 1 sound intercarrier input voltage 2 sound intercarrier input voltage 1 tuner AGC output single reference QSS output voltage composite video output voltage video buffer input voltage AFC output VCO1 reference circuit for 2fPC VCO2 reference circuit for 2fPC
1 2VP
handbook, halfpage
TDA9813T
Vi VIF1 Vi VIF2 n.c. TADJ TPLL
1 2 3 4 5 6 7
28 V i SIF2 27 V i SIF1 26 VP 25 C VAGC 24 GND 23 Cref 22 VCO2
CSAGC n.c. Vo CVBS n.c.
TDA9813T
8 9 21 VCO1 20 AFC 19 Vi(vid) 18 Vo(vid) 17 Vo QSS 16 TAGC 15 V i FM1
MHA038
Vo AF1 10 Vo AF2 11 CDEC2 12 CDEC1 13 Vi FM2 14
reference capacitor
ground VIF-AGC capacitor supply voltage SIF differential input signal voltage 1 SIF differential input signal voltage 2 Fig.2 Pin configuration.
1999 Sep 16
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Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
FUNCTIONAL DESCRIPTION The integrated circuit comprises the functional blocks as shown in Fig.1: * Vision IF amplifier * Tuner and VIF-AGC * Frequency Phase Locked Loop (FPLL) detector * VCO, Travelling Wave Divider (TWD) and AFC * Video demodulator and amplifier * Video buffer * SIF amplifier and SIF-AGC * Single reference Quasi Split Sound (QSS) mixer * FM-PLL demodulator * Internal voltage stabilizer and 12VP reference. Vision IF amplifier The vision IF amplifier consists of three AC-coupled differential amplifier stages. Each differential stage comprises a feedback network controlled by emitter degeneration. Tuner and VIF-AGC The AGC capacitor voltage is transferred to an internal IF control signal, and is fed to the tuner AGC to generate the tuner AGC output current (open-collector output). The tuner AGC takeover point can be adjusted. This allows the tuner and the SAW filter to be matched to achieve the optimum IF input level. The AGC detector charges/discharges the AGC capacitor to the required voltage for setting of VIF and tuner gain in order to keep the video signal at a constant level. Therefore the sync level of the video signal is detected. Frequency Phase Locked Loop (FPLL) detector The VIF amplifier output signal is fed into a frequency detector and into a phase detector via a limiting amplifier. During acquisition the frequency detector produces a DC current proportional to the frequency difference between the input and the VCO signal. After frequency lock-in the phase detector produces a DC current proportional to the phase difference between the VCO and the input signal. The DC current of either frequency detector or phase detector is converted into a DC voltage via the loop filter, which controls the VCO frequency.
TDA9813T
VCO, Travelling Wave Divider (TWD) and AFC The VCO operates with a resonance circuit (with L and C in parallel) at double the PC frequency. The VCO is controlled by two integrated variable capacitors. The control voltage required to tune the VCO from its free-running frequency to actually double the PC frequency is generated by the frequency-phase detector (FPLL) and fed via the loop filter to the first variable capacitor. This control voltage is amplified and additionally converted into a current which represents the AFC output signal. At centre frequency the AFC output current is equal to zero. The oscillator signal is divided-by-two with a TWD which generates two differential output signals with a 90 degree phase difference independent of the frequency. Video demodulator and amplifier The video demodulator is realized by a multiplier which is designed for low distortion and large bandwidth. The vision IF input signal is multiplied with the `in phase' signal of the travelling wave divider output. The demodulator output signal is fed via an integrated low-pass filter for attenuation of the carrier harmonics to the video amplifier. The video amplifier is realized by an operational amplifier with internal feedback and high bandwidth. A low-pass filter is integrated to achieve an attenuation of the carrier harmonics. The video output signal is 1 V (p-p) for nominal vision IF modulation. Video buffer For an easy adaption of the sound traps an operational amplifier with internal feedback is used. This amplifier is featured with a high bandwidth and 7 dB gain. The input impedance is adapted for operating in combination with ceramic sound traps. The output stage delivers a nominal 2 V (p-p) positive video signal. Noise clipping is provided. SIF amplifier and SIF-AGC The sound IF amplifier consists of two AC-coupled differential amplifier stages. Each differential stage comprises a controlled feedback network provided by emitter degeneration. The SIF-AGC detector is related to the SIF input signals (average level of FM carriers) and controls the SIF amplifier to provide a constant SIF signal to the single reference QSS mixer.
1999 Sep 16
6
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
Single reference QSS mixer The single reference QSS mixer is realized by a multiplier. The SIF amplifier output signal is fed to the single reference QSS mixer and converted to intercarrier frequency by the regenerated picture carrier (VCO). The mixer output signal is fed via a high-pass for attenuation of the video signal components to the output pin 17. With this system a high performance hi-fi stereo sound processing can be achieved. FM-PLL demodulator Each FM-PLL demodulator consists of a limiter, an FM-PLL and an AF amplifier. The limiter provides the amplification and limitation of the FM sound intercarrier signal before demodulation. The result is high sensitivity and AM suppression. The amplifier consists of 7 stages which are internally AC-coupled in order to minimize the DC offset and to save pins for DC decoupling. The second limiter is extended with an additional level detector consisting of a rectifier and a comparator. By means of this the AF2 signal is set to mute and the PLL VCO is switched off, if the intercarrier signal at pin 14 is below 1 mV (RMS) in order to avoid false identification of a stereo decoder. It should be noted that noise at pin 14 disables the mute state (at low SIF input signal), but this will not lead to false identification. This `auto-mute' function can be disabled by connecting a 5.6 k resistor from pin 14 to VP (see Fig.11). Furthermore the AF output signals can be muted by connecting a resistor between the limiter inputs pin 14 or pin 15 and ground. The FM-PLL consists of an integrated relaxation oscillator, an integrated loop filter and a phase detector. The oscillator is locked to the FM intercarrier signal, output from the limiter. As a result of locking, the oscillator frequency tracks with the modulation of the input signal and the oscillator control voltage is superimposed by the AF voltage. The FM-PLL operates as an FM demodulator. The AF amplifier consists of two parts:
TDA9813T
1. The AF preamplifier for FM sound is an operational amplifier with internal feedback, high gain and high common mode rejection. The AF voltage from the PLL demodulator, by principle a small output signal, is amplified by approximately 33 dB. The low-pass characteristic of the amplifier reduces the harmonics of the intercarrier signal at the sound output terminal. An additional DC control circuit is implemented to keep the DC level constant, independent of process spread. 2. The AF output amplifier (10 dB) provides the required output level by a rail-to-rail output stage. This amplifier makes use of an input selector for switching to FM or mute state, controlled by the mute switching voltage. Internal voltage stabilizer and 12VP reference The band gap circuit internally generates a voltage of approximately 1.25 V, independent of supply voltage and temperature. A voltage regulator circuit, connected to this voltage, produces a constant voltage of 3.6 V which is used as an internal reference voltage. For all audio output signals the constant reference voltage cannot be used because large output signals are required. Therefore these signals refer to half the supply voltage to achieve a symmetrical headroom, especially for the rail-to-rail output stage. For ripple and noise attenuation the 12VP voltage has to be filtered via a low-pass filter by using an external capacitor together with an integrated resistor (fg = 5 Hz). For a fast setting to 12VP an internal start-up circuit is added.
1999 Sep 16
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Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VP Vn ts(max) V16 Tstg Tamb Ves Notes 1. IP = 125 mA; Tamb = 70 C; Rth(j-a) = 80 K/W. 2. Machine model class B (L = 2.5 H). THERMAL CHARACTERISTICS SYMBOL Rth(j-a) PARAMETER thermal resistance from junction to ambient CONDITIONS in free air VALUE 80 PARAMETER supply voltage (pin 26) voltage at pins 1 to 7, 9 to 16, 19, 20 and 23 to 28 maximum short-circuit time tuner AGC output voltage storage temperature ambient temperature electrostatic handling voltage note 2 CONDITIONS maximum chip temperature of 125 C; note 1 0 0 - 0 -25 -20 -300 MIN.
TDA9813T
MAX. 5.5 VP 10 13.2 +150 +70 +300 V V s V
UNIT
C C V
UNIT K/W
1999 Sep 16
8
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
TDA9813T
CHARACTERISTICS VP = 5 V; Tamb = 25 C; see Table 1 for input frequencies and carrier ratios (B/G standard); input level Vi IF 1-2 = 10 mV RMS value (sync-level); video modulation DSB; residual carrier: 10%; video signal in accordance with "CCIR, line 17"; measurements taken in Fig.11; unless otherwise specified. SYMBOL Supply (pin 26) VP IP Vi VIF(rms) Vi max(rms) Vo(int) supply voltage supply current -1 dB video at output +1 dB video at output within AGC range; f = 5.5 MHz see Fig.3 note 2 note 2 note 1 4.5 93 - 120 - 5 109 5.5 125 V mA V mV dB PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Vision IF amplifier (pins 1 and 2) input signal voltage sensitivity (RMS value) maximum input signal voltage (RMS value) internal IF amplitude difference between picture and sound carrier IF gain control range differential input resistance DC input voltage 60 200 0.7 100 - 1
GIFcr Ri(diff) Ci(diff) V1,2 fVCO(max)
65 1.7 1.2 - 125
70 2.2 1.7 3.4
- 2.7 2.5 - -
dB k pF V
differential input capacitance note 2
True synchronous video demodulator; note 3 maximum oscillator frequency for carrier regeneration oscillator drift as a function of temperature oscillator voltage swing at pins 21 and 22 (RMS value) picture carrier capture range acquisition time VIF input signal voltage sensitivity for PLL to be locked (RMS value; pins 1 and 2) BL = 75 kHz; note 5 maximum IF gain; note 6 f = 2fPC 130 MHz
fosc/T Vo ref(rms) fPC CR tacq Vi VIF(rms)
oscillator is free-running; IAFC = 0; note 4
- 70 1.4 - -
- 100 1.8 - 30
20 x 10-6 K-1 130 - 30 70 mV MHz ms V
Composite video amplifier (pin 18; sound carrier off) Vo video(p-p) V/S output signal voltage (peak-to-peak value) ratio between video (black-to-white) and sync level sync voltage level upper video clipping voltage level see Fig.8 0.88 1.9 1.0 2.33 1.12 3.0 V -
V18(sync) V18(clu)
-
1.5
- -
V V
VP - 1.1 VP - 1
1999 Sep 16
9
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
SYMBOL V18(cll) Ro,18 Iint 18 I18 max(sink) I18 max(source) B-1 B-3 H(sup) PSRR PARAMETER lower video clipping voltage level output resistance internal DC bias current for emitter-follower maximum AC and DC output sink current maximum AC and DC output source current -1 dB video bandwidth -3 dB video bandwidth suppression of video signal harmonics CL < 50 pF; RL > 1 k; AC load CL < 50 pF; RL > 1 k; AC load CL < 50 pF; RL > 1 k; AC load; note 7a note 2 CONDITIONS - - 2.2 1.6 2.9 5 7 35 32 MIN. TYP. 0.7 - 3.0 - - 6 8 40 35
TDA9813T
MAX. 0.9 10 - - - - - - -
UNIT V mA mA mA MHz MHz dB dB
power supply ripple rejection video signal; grey level; at pin 18 see Fig.9
CVBS buffer amplifier (only) and noise clipper (pins 8 and 19) Ri,19 Ci,19 VI,19 Gv V8(clu) V8(cll) Ro,8 Iint 8 Io,8 max(sink) Io,10 max(source) B-1 B-3 input resistance input capacitance DC input voltage voltage gain upper video clipping voltage level lower video clipping voltage level output resistance DC internal bias current for emitter-follower maximum AC and DC output sink current maximum AC and DC output source current -1 dB video bandwidth -3 dB video bandwidth CL < 20 pF; RL > 1 k; AC load CL < 20 pF; RL > 1 k; AC load note 2 note 8 note 2 note 2 2.6 1.4 1.4 6.5 3.9 - - 2.0 1.4 2.4 8.4 11 3.3 2 1.7 7 4.0 1.0 - 2.5 - - 11 14 4.0 3.0 2.0 7.5 - 1.1 10 - - - - - k pF V dB V V mA mA mA MHz MHz
Measurements from IF input to CVBS output (pin 8; 330 between pins 18 and 19, sound carrier off) Vo CVBS(p-p) CVBS output signal voltage on pin 8 (peak-to-peak value) sync voltage level note 8 1.7 2.0 2.3 V
Vo CVBS(sync)
-
1.35
-
V
1999 Sep 16
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Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
SYMBOL Vo Vo(blB/G) Gdiff diff B-1 B-3 S/N(W) S/N IM1.1 PARAMETER deviation of CVBS output signal voltage at B/G black level tilt in B/G standard differential gain differential phase -1 dB video bandwidth -3 dB video bandwidth weighted signal-to-noise ratio unweighted signal-to-noise ratio intermodulation attenuation at `blue' intermodulation attenuation at `yellow' IM3.3 intermodulation attenuation at `blue' intermodulation attenuation at `yellow' pc(rms) H(sup) H(spur) PSRR residual picture carrier (RMS value) suppression of video signal harmonics spurious elements CONDITIONS 50 dB gain control 30 dB gain control gain variation; note 9 - - - - - 5 7 56 49 58 60 58 59 - 35 40 25 MIN. - - - 2 1 6 8 60 53 64 66 64 65 2 40 - 28 TYP.
TDA9813T
MAX. 0.5 0.1 1 5 2 - - - - - - - - 5 - - -
UNIT dB dB % % deg MHz MHz dB dB dB dB dB dB mV dB dB dB
"CCIR, line 330" "CCIR, line 330"
CL < 20 pF; RL > 1 k; AC load CL < 20 pF; RL > 1 k; AC load see Fig.5 and note 10 see Fig.5 and note 10 f = 1.1 MHz; see Fig.6 and note 11 f = 1.1 MHz; see Fig.6 and note 11 f = 3.3 MHz; see Fig.6 and note 11 f = 3.3 MHz; see Fig.6 and note 11 fundamental wave and harmonics note 7a note 7b
power supply ripple rejection video signal; grey level; at pin 8 see Fig.9
VIF-AGC detector (pin 25) I25 tresp charging current discharging current AGC response to an increasing VIF step AGC response to a decreasing VIF step Tuner AGC (pin 16) Vi(rms) IF input signal voltage for minimum starting point of tuner takeover (RMS value) IF input signal voltage for maximum starting point of tuner takeover (RMS value) Vo,16 1999 Sep 16 permissible output voltage input at pins 1 and 2; RTOP = 22 k; I16 = 0.4 mA input at pins 1 and 2; RTOP = 0 ; I16 = 0.4 mA - 2 5 mV note 12 note 9 0.75 15 - - 1 20 0.05 2.2 1.25 25 0.1 3.5 mA A ms/dB ms/dB
50
100
-
mV
from external source; note 2 - 11
-
13.2
V
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
SYMBOL Vsat,16 VTOP,16/T I16(sink) PARAMETER saturation voltage CONDITIONS I16 = 1.5 mA - - MIN. - 0.03 TYP.
TDA9813T
MAX. 0.2 0.07
UNIT V dB/K
variation of takeover point by I16 = 0.4 mA temperature sink current see Fig.3 no tuner gain reduction; V16 = 13.2 V maximum tuner gain reduction
- 1.5 -
- 2 6
1 2.6 8
A mA dB
GIF
IF slip by automatic gain control control steepness I20/f frequency variation by temperature output voltage upper limit output voltage lower limit output source current output sink current residual video modulation current (peak-to-peak value)
tuner gain current from 20% to 80%
AFC circuit (pin 20); see Fig.7 and note 13 S fIF/T Vo,20 Io,20(source) Io,20(sink) I20(p-p) note 14 IAFC = 0; note 5 see Fig.7 without external components see Fig.7 0.5 - 0.75 - 1.0 20 x 10-6 A/kHz K-1 V V A A A
VP - 0.6 VP - 0.3 - - 150 150 - 0.3 200 200 20 0.6 250 250 30
Sound IF amplifier (pins 27 and 28) Vi SIF(rms) Vi max(rms) GSIFcr Ri(diff) Ci(diff) VI(27,28) ct(SIF,VIF) input signal voltage sensitivity (RMS value) maximum input signal voltage (RMS value) SIF gain control range differential input resistance DC input voltage crosstalk attenuation between SIF and VIF input between pins 1 and 2 and pins 27 and 28; note 15 -3 dB at intercarrier output pin 17 +1 dB at intercarrier output pin 17 see Fig.4 note 2 - 50 60 1.7 1.2 - 50 30 70 67 2.2 1.7 3.4 - 70 - - 2.7 2.5 - - V mV dB k pF V dB
differential input capacitance note 2
SIF-AGC detector (pin 6) I6 charging current discharging current Single reference QSS intercarrier mixer (B/G standard; pin 17) Vo(rms) B-3 SC(rms) Ro,17 VO,17 1999 Sep 16 IF intercarrier level (RMS value) residual sound carrier (RMS value) output resistance DC output voltage 12 SC1; sound carrier 2 off 75 7.5 - - - 100 9 2 - 2.0 125 - - 25 - mV MHz mV V 8 8 12 12 16 16 A A
-3 dB intercarrier bandwidth upper limit fundamental wave and harmonics note 2
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
SYMBOL Iint 17 I17 max(sink) I17 max(source) PARAMETER DC internal bias current for emitter-follower maximum AC and DC output sink current maximum AC and DC output source current CONDITIONS MIN. 1.5 1.1 3.0 TYP. 1.9 1.5 3.5 - - -
TDA9813T
MAX.
UNIT mA mA mA
Limiter amplifier 1 (pin 15); note 16 Vi FM(rms) Vi FM(rms) input signal voltage for lock-in (RMS value) input signal voltage (RMS value) allowed input signal voltage (RMS value) Ri,15 VI,15 Vi FM(rms) Vi FM(rms) input resistance DC input voltage note 2 S+N ------------- = 40 dB N - - 200 480 - - S+N ------------- = 40 dB N PLL1 has to be in locked mode; auto mute off - - 300 - 600 2.8 - 300 100 400 - 720 - 100 400 V V mV V V V
Limiter amplifier 2 (pin 14); note 16 input signal voltage for lock-in (RMS value) input signal voltage (RMS value)
allowed input signal voltage (RMS value) input signal voltage for no auto mute; PLL enabled (RMS value) HYS14 Ri,14 VI,14 fi FM(catch) fi FM(hold) tacq hysteresis of level detector for auto mute input resistance DC input voltage note 2
200 0.7
- 1
- 1.5
mV mV
-3 480 - upper limit lower limit upper limit lower limit 7.0 - 8.0 - -
-6 600 2.0 - - - - -
-8 720 - - 4.0 - 3.5 4
dB V
FM-PLL demodulator catching range of PLL holding range of PLL acquisition time MHz MHz MHz MHz s
1999 Sep 16
13
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
SYMBOL PARAMETER CONDITIONS MIN. TYP.
TDA9813T
MAX.
UNIT
FM operation (B/G standard; pins 10 and 11); notes 16 and 16a Vo AF10,11(rms) AF output signal voltage (RMS value) 27 kHz (54% FM deviation); see Fig.11 and note 17 Rx = Ry = 470 Rx = Ry = 0 Vo AF10,11(cl) fAF Vo/T V12,13 R10,11 V10,11 I10,11max(sink) AF output clipping signal voltage level frequency deviation temperature drift of AF output signal voltage DC voltage at decoupling capacitor output resistance DC output voltage maximum AC and DC output sink current voltage dependent on VCO frequency; note 18 note 2 tracked with supply voltage THD < 1.5% THD < 1.5%; note 17 200 400 1.3 - - 1.2 - - - - 100 - FM-PLL only; with 50 s de-emphasis; 27 kHz (54% FM deviation); "CCIR 468-4" fundamental wave and harmonics 50 s de-emphasis; AM: f = 1 kHz; m = 0.3 refer to 27 kHz (54% FM deviation) 55 250 500 1.4 - 3x - -
1 2VP
300 600 - 53
mV mV V kHz dB/K V V mA mA kHz % dB
10-3
7x 3.0
10-3
100 - 1.1 1.1 - 0.5 -
- - 125 0.15 60
I10,11max(source) maximum AC and DC output source current B-3 THD S/N(W) -3 dB video bandwidth total harmonic distortion weighted signal-to-noise ratio
SC(rms) AM
residual sound carrier (RMS value) AM suppression
- 46
- 50
75 -
mV dB
10,11 V10,11
mute attenuation of AF signal DC jump voltage of AF output terminals for switching AF output to mute state and vice versa FM-PLLs in lock mode; note 19
70 -
80 50
- 150
dB mV
PSRR
power supply ripple rejection Rx = Ry = 0 ; see Figs 9 and 11 at pins 10 and 11
22
28
-
dB
1999 Sep 16
14
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
SYMBOL PARAMETER CONDITIONS MIN. - TYP. -
TDA9813T
MAX.
UNIT
Single reference QSS AF performance for FM operation (B/G standard); see Table 1 and notes 20, 21 and 22 S/N(W) weighted signal-to-noise ratio (SC1/SC2) PC/SC1 ratio at pins 1 and 2; 27 kHz (54% FM deviation); "CCIR 468-4" black picture white picture 6 kHz sine wave; black-to-white modulation 40 dB
53/48 50/46 42/40
58/55 55/52 48/46 53/50
- - - -
dB dB dB dB
250 kHz square wave; 45/42 black-to-white modulation; see note 2 in Fig.12 sound carrier subharmonics; f = 2.75 MHz 3 kHz sound carrier subharmonics; f = 2.87 MHz 3 kHz Notes 1. Values of video and sound parameters are decreased at VP = 4.5 V. 45/44
51/50
-
dB
46/45
52/51
-
dB
2. This parameter is not tested during production and is only given as application information for designing the television receiver. 3. Loop bandwidth BL = 75 kHz (natural frequency fn = 11 kHz; damping factor d 3.5; calculated with sync level within gain control range). Resonance circuit of VCO: Q0 > 50; Cext = 8.2 pF 0.25 pF; Cint 8.5 pF (loop voltage approximately 2.7 V). 4. Temperature coefficient of external LC circuit is equal to zero. 5. Vi IF = 10 mV RMS; f = 1 MHz (VCO frequency offset related to picture carrier frequency); white picture video modulation. 6. Vi IF signal for nominal video signal. 7. Measurements taken with SAW filter G3962 (sound carrier suppression: 40 dB); loop bandwidth BL = 75 kHz: a) Modulation VSB; sound carrier off; fvideo > 0.5 MHz. b) Sound carrier on; SIF SAW filter G9353; fvideo = 10 kHz to 10 MHz. 8. The 7 dB buffer gain accounts for 1 dB loss in the sound trap. Buffer output signal is typical 2 V (p-p), in event of CVBS video amplifier output typical 1 V (p-p). If no sound trap is applied a 330 resistor must be connected from output to input (between pin 18 and pin 19). 9. The leakage current of the AGC capacitor should not exceed 1 A. Larger currents will increase the tilt. 10. S/N is the ratio of black-to-white amplitude to the black level noise voltage (RMS value), on pin 8. B = 5 MHz weighted in accordance with "CCIR 567". 11. The intermodulation figures are defined: V 0 at 4.4 MHz 1.1 = 20 log ------------------------------------- + 3.6 dB ; 1.1 value at 1.1 MHz referenced to black/white signal; V 0 at 1.1 MHz V 0 at 4.4 MHz 3.3 = 20 log ------------------------------------- ; 3.3 value at 3.3 MHz referenced to colour carrier. V 0 at 3.3 MHz 12. Response speed valid for a VIF input level range of 200 V up to 70 mV. 1999 Sep 16 15
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
TDA9813T
13. To match the AFC output signal to different tuning systems a current source output is provided. The test circuit is given in Fig.7. The AFC steepness can be changed by the resistors at pin 20. 14. Depending on the ratio C/C0 of the LC resonant circuit of VCO (Q0 > 50; see note 3; C0 = Cint + Cext). 15. Source impedance: 2.3 k in parallel to 12 pF (SAW filter); fIF = 38.9 MHz. 16. Input level for second IF from an external generator with 50 source impedance. AC-coupled with 10 nF capacitor, fmod = 1 kHz, 27 kHz (54% FM deviation) of audio references. A VIF/SIF input signal is not permitted. Pins 6 and 25 have to be connected to positive supply voltage for minimum IF gain. S/N and THD measurements are taken at 50 s de-emphasis. The not tested FM-PLL has to be locked to an unmodulated carrier. a) Second IF input level 10 mV RMS. 17. Measured with an FM deviation of 27 kHz the typical AF output signal is 500 mV RMS (Rx = Ry = 0 ; see Fig.11). By using Rx = Ry = 470 the AF output signal is attenuated by 6 dB (250 mV RMS) and adapted to the stereo decoder family TDA9840. For handling an FM deviation of more than 53 kHz the AF output signal has to be reduced by using Rx and Ry in order to avoid clipping (THD < 1.5%). For an FM deviation up to 100 kHz an attenuation of 6 dB is recommended with Rx = Ry = 470 . 18. The leakage current of the decoupling capacitor (2.2 F) should not exceed 1 A. 19. In the event of activated auto mute state the second FM-PLL oscillator is switched off, if the input signal at pin 14 is missing or too weak (see Fig.11). In the event of switching the second FM-PLL oscillator on by the auto mute stage an increased DC jump is the consequence. It should be noted that noise at pin 14 disables the mute state (at low SIF input signal), but this will not lead to false identification of the stereo decoder family TDA9840. 20. For all S/N measurements the used vision IF modulator has to meet the following specifications: a) Incidental phase modulation for black-to-white jump less than 0.5 degrees. b) QSS AF performance, measured with the television-demodulator AMF2 (audio output, weighted S/N ratio) better than 60 dB (deviation 27 kHz) for 6 kHz sine wave black-to-white video modulation. c) Picture-to-sound carrier ratio; PC/SC1 = 13 dB (transmitter). 21. Measurements taken with SAW filter G3962 (Siemens) for vision IF (suppressed sound carrier) and G9350 (Siemens) for sound IF (suppressed picture carrier). Input level Vi SIF = 10 mV RMS, 27 kHz (54% FM deviation). 22. The PC/SC ratio at pins 1 and 2 is calculated as the addition of TV transmitter PC/SC ratio and SAW filter PC/SC ratio. This PC/SC ratio is necessary to achieve the S/N(W) values as noted. A different PC/SC ratio will change these values. Table 1 Input frequencies and carrier ratios DESCRIPTION Picture carrier Sound carrier Picture-to-sound carrier ratio SYMBOL fPC fSC1 fSC2 SC1 SC2 B/G STANDARD 38.9 33.4 33.158 13 20 UNIT MHz MHz MHz dB dB
1999 Sep 16
16
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
TDA9813T
handbook, full pagewidth gain
70
MED861 - 1
0.06
(dB) 60 Ituner (mA) 0 40
VIF input (1,2) (mV RMS) 0.6
50
30
(1) (2) (3) (4)
6
20
1
10
60
0 2 -10 1 1.5 (3) Ituner; RTOP = 11 k. (4) Ituner; RTOP = 0 . 2 2.5 3 3.5 4 V25 (V) 4.5
(1) Ituner; RTOP = 22 k. (2) Gain.
Fig.3 Typical VIF and tuner AGC characteristic.
handbook, full pagewidth
110
MHA039
100
(dBV) 100 90 80 70
SIF input (27,28) (mV RMS) 10
1
60 50
0.1
40 30
0.01
20 1 1.5 2 2.5 3 3.5 4 V6 (V) 4.5
Fig.4 Typical SIF-AGC characteristic.
1999 Sep 16
17
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
TDA9813T
handbook, halfpage
75
MED684
S/N (dB)
handbook, halfpage
3.2 dB 10 dB 13.2 dB 27 dB
50
13.2 dB 27 dB
25
SC CC
PC
SC CC
PC
BLUE
0 -60 0.06 -40 0.6 -20 6 10 0 20
YELLOW
MED685 - 1
Vi (VIF)(rms)(dB) 60 600 Vi (VIF)(rms)(mV)
SC = sound carrier, with respect to sync level. CC = chrominance carrier, with respect to sync level. PC = picture carrier, with respect to sync level. The sound carrier levels are taking into account a sound shelf attenuation of 20 dB (SAW filter G1962).
Fig.5
Typical signal-to-noise ratio as a function of IF input voltage.
Fig.6 Input signal conditions.
handbook, full pagewidth
VP
VP = 5 V
V20 I20 (V) (A) -200 -100 2.5 0 100 200
MHA040
22 k
(source current)
TDA9813T 20
I20 22 k
(sink current)
38.5
38.9
39.3 f (MHz)
Fig.7 Measurement conditions and typical AFC characteristic.
1999 Sep 16
18
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
TDA9813T
handbook, halfpage 2.5 V
white level
1.8 V 1.5 V
black level sync level
B/G standard
MHA041
Fig.8 Typical video signal levels on output pin 18 (sound carrier off).
handbook, full pagewidth
VP = 5 V VP = 5 V
100 mV (fripple = 70 Hz)
TDA9813T
MHA042
t
Fig.9 Ripple rejection condition.
1999 Sep 16
19
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
TDA9813T
ndbook, full pagewidth
140 antenna input (dBV)
10 IF signals RMS value (V) video 2 V (p-p) 1
120
(1)
100
SAW insertion loss 14 dB IF slip 6 dB
10-1
80
tuning gain control range 70 dB VIF AGC
10-2 (TOP)
60
10-3 0.66 x 10-3 SAW insertion loss 14 dB
40 40 dB RF gain
10-4
20
10-5 0.66 x 10-5
10 VHF/UHF tuner tuner VIF SAW filter VIF amplifier, demodulator and video TDA9813T
MHB571
(1) Depends on TOP.
Fig.10 Front-end level diagram.
1999 Sep 16
20
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
INTERNAL CIRCUITRY Table 2 PIN NO. 1 2 Equivalent pin circuits and pin voltages PIN SYMBOL Vi VIF1 Vi VIF2 DC VOLTAGE (V) 3.4 3.4
1 1.1 k 650 A +
TDA9813T
EQUIVALENT CIRCUIT (WITHOUT ESD PROTECTION CIRCUIT)
+
800 2
1.1 k
3.4 V
650 A
MHA673
3 4
n.c. TADJ
- 0 to 1.9
30 k 20 k 3.6 V
9 k 4 1.9 V
MHB020
5
TPLL
1.5 to 4.0
+
+
+
+
Ib 5
+
VCO 200 A
MHB021
1999 Sep 16
21
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
PIN NO. 6 PIN SYMBOL CSAGC DC VOLTAGE (V) 1.5 to 4.0
TDA9813T
EQUIVALENT CIRCUIT (WITHOUT ESD PROTECTION CIRCUIT)
+ 15 A
6 Ib + + +
1 A
MHB022
7 8
n.c. Vo CVBS
- sync level: 1.35
+
8 2.5 mA
MHB024
9 10
n.c. Vo AF1
- 2.3
21.7 k 10 25 pF 23.7 k + +
120
MHB025
1999 Sep 16
22
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
PIN NO. 11 PIN SYMBOL Vo AF2 DC VOLTAGE (V) 2.3
21.7 k 11 25 pF 23.7 k
TDA9813T
EQUIVALENT CIRCUIT (WITHOUT ESD PROTECTION CIRCUIT)
+ +
120
MHB026
12
CDEC2
1.2 to 3.0
+ +
+ 90 A
12
1 k
MHB027
13
CDEC1
1.2 to 3.0
+ +
+ 90 A
13
1 k
MHB028
1999 Sep 16
23
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
PIN NO. 14 PIN SYMBOL Vi FM2 DC VOLTAGE (V) 2.65
14 640 400 40 k
TDA9813T
EQUIVALENT CIRCUIT (WITHOUT ESD PROTECTION CIRCUIT)
2.65 V
35 A
600 A
MHB029
15
Vi FM1
2.65
15 640 400 40 k
2.65 V
35 A
600 A
MHB030
16
TAGC
0 to 13.2
16
MHB031
17
Vo QSS
2.0
+ 150
1.9 mA 17 14.7 k
MHB032
18
Vo(vid)
sync level: 1.5
+ 100
2.1 pF 3.0 mA 18
MHB033
1999 Sep 16
24
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
PIN NO. 19 PIN SYMBOL Vi(vid) DC VOLTAGE (V) 1.7
TDA9813T
EQUIVALENT CIRCUIT (WITHOUT ESD PROTECTION CIRCUIT)
3.3 k 2 k 19
2.2 k
MHB034
20
AFC
0.3 to VP - 0.3
+
+
20
IAFC 200 A
MHB035
21 22
VCO1 VCO2
2.7 2.7
21 22 + 420 420 50
+
500 A
MHB570
2.8 V
1999 Sep 16
25
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
PIN NO. 23 PIN SYMBOL Cref DC VOLTAGE (V)
1 V 2P
TDA9813T
EQUIVALENT CIRCUIT (WITHOUT ESD PROTECTION CIRCUIT)
+ 20 k
+
+
70 k 20 k 23
650
MHB037
24 25
GND CVAGC
0 1.5 to 4.0
40 A
25 Ib
1 mA
2.5 A
0.3/20/40 A
MHB038
26 27 28
VP Vi SIF1 Vi SIF2
VP 3.4 3.4
27 + 1.1 k 5 k 100 A 400 A 10 k 1.8 V + +
1.1 k 28 800 3.4 V
400 A
MHB039
1999 Sep 16
26
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VP 22 k 100 nF 1:1 SIF input 50 1 2 3 5 4 VIF AGC 28 27 26 25 2.2 F 24 2.2 F 23 Cref 8.2 pF 330 20 19 18 17 10 nF GND Q0 > 50
(1)
TEST AND APPLICATION INFORMATION
Philips Semiconductors
VIF-PLL with QSS-IF and dual FM-PLL demodulator
AFC QSS intercarrier output 22 k video output
tuner AGC AF1 mute switch 10 nF
560 SFT 5.5 MHz
5.6 k
22
21
16
15 560
TDA9813T
SFT 5.74 MHz 9 n.c. Rx
(2)
(1) Application for improved 250 kHz sound performance. (2) See note 17 of Chapter "Characteristics".
Fig.11 Test circuit.
handbook, full pagewidth
27
1 2 3 n.c. 5 4 3 TOP 22 k loop filter SIF AGC 220 nF
(1)
4
5
6
7 n.c. 2.2 F
8
10
11
12
13
14
1:1 VIF input 50 1 2
Ry
(2)
5.6 k 10 nF AF2 mute switch + 5 V: auto mute off open: auto mute on ground: mute
22 F CVBS 5.6 k 10 nF 39 pF 820 pF 5.6 k CAF2 10 nF CAF1
22 F
470
+5V AF1 output de-emphasis AF2 output de-emphasis
Product specification
MHA043
TDA9813T
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VP 22 k 100 nF Q0 > 50 22 k AFC QSS intercarrier output video output
(2)
Philips Semiconductors
VIF-PLL with QSS-IF and dual FM-PLL demodulator
tuner AGC
AF1 mute switch 10 nF
10 nF IF input 50
330
SAW FILTER G9350
(1)
560 SFT 5.5 MHz
5.6 k
VIF AGC 28 27 26 25
2.2 F
2.2 F
Cref
8.2 pF
15 H
24
23
22
21
20
19
18
17
16
15 560
(1) Depends on standard. (2) Application for improved 250 kHz sound performance. (3) See note 17 of Chapter "Characteristics".
Fig.12 Application circuit.
handbook, full pagewidth
28
1 2 3 n.c. SAW FILTER G3962
(1)
TDA9813T
4 5 6 7 n.c. TOP 22 k loop filter SIF AGC 220 nF
(2)
SFT 5.74 MHz 9 n.c. 10 11 12 13 14
8
2.2 F 22 F CVBS CAF2
Rx
(3)
Ry
(3)
5.6 k 10 nF AF2 mute switch + 5 V: auto mute off open: auto mute on ground: mute
CAF1
22 F
470
39 pF
820 pF
de-emphasis depending on TV standard/stereo decoder
+5V
MHA044
Product specification
TDA9813T
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
PACKAGE OUTLINE SO28: plastic small outline package; 28 leads; body width 7.5 mm
TDA9813T
SOT136-1
D
E
A X
c y HE vMA
Z 28 15
Q A2 A1 pin 1 index Lp L 1 e bp 14 wM detail X (A 3) A
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT136-1 REFERENCES IEC 075E06 JEDEC MS-013AE EIAJ EUROPEAN PROJECTION A max. 2.65 0.10 A1 0.30 0.10 A2 2.45 2.25 A3 0.25 0.01 bp 0.49 0.36 c 0.32 0.23 D (1) 18.1 17.7 0.71 0.69 E (1) 7.6 7.4 0.30 0.29 e 1.27 0.050 HE 10.65 10.00 L 1.4 Lp 1.1 0.4 Q 1.1 1.0 0.043 0.039 v 0.25 0.01 w 0.25 0.01 y 0.1 0.004 Z
(1)
0.9 0.4 0.035 0.016
0.012 0.096 0.004 0.089
0.019 0.013 0.014 0.009
0.419 0.043 0.055 0.394 0.016
8o 0o
ISSUE DATE 95-01-24 97-05-22
1999 Sep 16
29
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
SOLDERING Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 C. The top-surface temperature of the packages should preferable be kept below 230 C. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results:
TDA9813T
* Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. * For packages with leads on two sides and a pitch (e): - larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. * For packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
1999 Sep 16
30
Philips Semiconductors
Product specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE WAVE BGA, SQFP HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS PLCC(3), SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO Notes not suitable not not not suitable(2) recommended(3)(4) recommended(5) suitable suitable suitable suitable suitable suitable
TDA9813T
REFLOW(1)
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods". 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
1999 Sep 16
31
Philips Semiconductors - a worldwide company
Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 1 60 101 1248, Fax. +43 1 60 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 20 0733, Fax. +375 172 20 0773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 68 9211, Fax. +359 2 68 9102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381, Fax. +1 800 943 0087 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V, Tel. +45 33 29 3333, Fax. +45 33 29 3905 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615 800, Fax. +358 9 6158 0920 France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex, Tel. +33 1 4099 6161, Fax. +33 1 4099 6427 Germany: Hammerbrookstrae 69, D-20097 HAMBURG, Tel. +49 40 2353 60, Fax. +49 40 2353 6300 Hungary: see Austria India: Philips INDIA Ltd, Band Box Building, 2nd floor, 254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025, Tel. +91 22 493 8541, Fax. +91 22 493 0966 Indonesia: PT Philips Development Corporation, Semiconductors Division, Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510, Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080 Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Via Casati, 23 - 20052 MONZA (MI), Tel. +39 039 203 6838, Fax +39 039 203 6800 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5057 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Pakistan: see Singapore Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Al.Jerozolimskie 195 B, 02-222 WARSAW, Tel. +48 22 5710 000, Fax. +48 22 5710 001 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 58088 Newville 2114, Tel. +27 11 471 5401, Fax. +27 11 471 5398 South America: Al. Vicente Pinzon, 173, 6th floor, 04547-130 SAO PAULO, SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 821 2382 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 93 301 6312, Fax. +34 93 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 5985 2000, Fax. +46 8 5985 2745 Switzerland: Allmendstrasse 140, CH-8027 ZURICH, Tel. +41 1 488 2741 Fax. +41 1 488 3263 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2886, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye, ISTANBUL, Tel. +90 216 522 1500, Fax. +90 216 522 1813 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 208 730 5000, Fax. +44 208 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381, Fax. +1 800 943 0087 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 62 5344, Fax.+381 11 63 5777
For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1999
Internet: http://www.semiconductors.philips.com
SCA 68
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
545004/02/pp32
Date of release: 1999
Sep 16
Document order number:
9397 750 06056

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